This invention relates to switching circuits, and more particularly to dynamic switching circuits with low power dissipation.
Crossbar current is an undesirable effect occurring in dynamic switching circuits because it contributes to power dissipation. Crossbar current can be present, for example, in the combination of a latch circuit coupled to a dynamic logic gate. To illustrate this, consider circuit 100 in FIG. 1, showing half latch (or half keeper) 110 coupled to domino gate 120. In this example, domino gate 120 is a simple inverter where IN is the input signal applied to nMOSFET 130 (n-metal oxide semiconductor field effect transistor), xcfx86 is the clock signal applied to pMOSFET 140 and nMOSFET 150, and OUT is the output signal captured, or latched, by half latch 110. Clock signal xcfx86 cycles through two phases, which we shall refer to as precharge and evaluation phases as shown in FIG. 1.
Ignoring any initialization procedure, the OUT signal will be HIGH and pMOSFET 160 will be ON when clock signal xcfx86 is in its precharge phase and the OUT signal will be the complement of IN when clock signal xcfx86 is in its evaluation phase. Half latch 110 provides a half keeper, or half latch, function to OUT. During a precharge phase, pMOSFET 140 brings OUT to HIGH and forces pMOSFET 160 ON if not already ON. If in the following evaluation phase IN happens to be LOW, then half latch 110 keeps, or latches, OUT HIGH throughout this evaluation phase so that OUT is properly the logical complement of IN.
Crossbar current arises as follows. If IN is HIGH, then OUT will transition from HIGH to LOW and pMOSFET 160 will switch from ON to OFF when clock signal xcfx86 transitions from its precharge phase to its evaluation phase. However, because pMOSFET 160 does not turn OFF instantaneously, there will be crossbar current flowing through transistor 160 and domino gate 120 when OUT transitions from HIGH to LOW and pMOSFET 160 switches from ON to OFF.
It is therefore desirable to reduce crossbar current duty cycle in dynamic switching circuits so as to reduce unwanted power dissipation and to increase switching rate.